When the device is on, the embedded microprocessor automatically reads and executes the software program from the memory, calls the embedded FPGA's configured physical equipment and the embedded micr

Guangdong Gao Yun Semiconductor Technology Co., Ltd. announced today: the Cloud semiconductor release based on the small Bee family Gw1ns series Gw1ns-2 FPGA-SOC chip hardware and software design integrated development platform. The integrated development platform of cloud semiconductor hardware and software design is based on a variety of fixed or configurable equipment model libraries provided by Gw1ns-2 FPGA-SOC as well as software drive libraries that match the equipment, so that the hardware design tools can be combined with software design tools to support gw1ns-2 FPGA-SOC hardware architecture design and embedded microprocessor software compile/connect/troubleshooting (Compile, Link, In-circuit-emulation/debug) and other functions;

and support ARM-MDK and GNU two software design tools. Unlike the traditional FPGA, which contains only programmable logic units, the gw1ns-2 is a truly miniaturized FPGA-SOC system chip, in addition to the programmable logic unit, embedded arm cortex-m3 microprocessor,

As well as the microprocessor fixed peripherals of the storage block-ram, Flash Flash, ADC and USB-2.0 PHY, thus, gw1ns-2 FPGA-SOC system chip application design both soft and hardware design process.

Through the integrated development platform of software and hardware design provided by high Cloud semiconductor, the design of FPGA architecture hardware and embedded microprocessor software designed by gw1ns-2 application design, both organically and seamlessly together, as shown in Figure 1, can greatly improve the efficiency of user design.

Fig. 1 Application design of gw1ns-2 FPGA-SOC combined with software and hardware design process The so-called FPGA-SOC system, that is, the use of FPGA programmable advantage, the user in different scenarios required by the interface and peripherals, by only 1.7K lut logic within the low density FPGA programmable logic unit to be programmed to implement, configured into a specific embedded CPU device,

The CPU data processing function is directly integrated into the miniature low density FPGA, which greatly expands the depth and breadth of FPGA application. The FPGA architecture hardware design starts from the circuit RTL (Verilog or VHDL), passes through the logic synthesis tool into the electric network table, then configures the physical restriction and the time series constraint of the circuit design, then through the Gao Yunyun source software layout wiring, through the static time series analysis and the circuit design layout to adjust,

Become the hardware binary bit stream document, finally through the cloud source software programmer to download into the gw1ns-2 Fpga-soc to carry on the hardware programming. The purpose of FPGA-SOC is to configure the gw1ns-2 embedded FPGA as a physical device with embedded microprocessor (CPU). The embedded microprocessor software design can start from the Software design tools (Compiler, Linker, Debugger) installed on the PC (PC), write the C language software program, then compile the software binary document and download it into the memory of the embedded microprocessor by Software Design tool.

When the device is on, the embedded microprocessor automatically reads and executes the software program from the memory, calls the embedded FPGA's configured physical equipment and the embedded microprocessor with the fixed physical equipment, and processes the data, completes the circuit software and hardware design function according to the software program command. The integrated development platform of software and hardware design for Cloud Semiconductor publishing