Intel 10nm technology is still struggling. Taiwan Semiconductor Manufacturing Co., Ltd. and Samsung Electronics Co., Ltd. have already begun mass production of 7nm. The next step is naturally 5nm. TSMC recently released some key indicators for 5nm for the first time. It does not look very optimistic.
Next year, TSMC's second-generation 7nm process will attempt to use the EUV EUV lithography system for the first time on some non-critical levels. The process node is upgraded from CLN7FF to CLN7FF+, claiming that the transistor density can be increased by 20%, and at the same density and frequency. Power consumption can be reduced by 10%.
TSMC 5nm (CLN5) will continue to use the Dutch ASML Twinscan NXE: 3400 EUV lithography system to expand the use of EUV, which can increase by 80% compared to the density of the first generation 7nm transistors (compared to the second generation is an increase of 50) % ).
It looks very powerful, but The actual frequency increase that can be brought about is only 15%, but the power consumption can only be reduced by 20% at the same density and frequency, compared with the second generation 7nm promotion is more limited.
However, TSMC also provided a 'Very Low Threshold Voltage' (ELTV)The options are Claimed to increase frequency increase to 25% , but did not explain how the specific is done.
The process is continuously evolving, but the improvements brought about by it are becoming more and more limited. It is enough to show that the semiconductor technology has a sharp increase in complexity and complexity. Certainly it does not rule out that TSMC has been too capricious in terms of process naming over the past few years and it is not as honest as Intel.
With such a limited improvement, we do not know whether we can attract customers to follow up. After all, we must fully consider the cost. The good news is that these new generations of TSMC technology are all 'likes', such as 7nm to the end of this year will have more than 50 chip streams Sheets, covering everything from high performance to embedded.
At present, the basic IP of TSMC EUV 7nm process has been verified by the chip, but key modules such as embedded FPGAs, HBM2, and GDDR5 will not be completed until the end of this year or early next year, and the 5nm version will be completed in July of this year. Version 0.5, a large number of IP modules such as PCI-E 4.0, DDR4, USB 3.1 will wait until 2019.
On the equipment side, TSMC will open a new fab Fab 8 for 5nm and introduce multiple new lithography machines, but At present, the average daily power of EUV lithography machines is only 145W, and some of them can last for 250W in several weeks. They are not enough to be fully commercialized. It is expected that they will reach 300W later this year and still need further improvement.
and also EUV lithography mask material problems, the current ultra-ultraviolet transmittance of only 83%, can be more than 90% next year.
