Taiwan Semiconductor Manufacturing Co., Ltd. held its 24th annual technical seminar in Santa Clara and released a technology that can revolutionize the graphics card - Wafer-on-Wafer (stacked wafer) technology. Stacked wafer technology uses silicon to form silicon wafers. Through-hole (TSV) connections with 10 micron holes are in contact with each other. According to TSMC's partner Cadence, stacked wafer designs can be placed on the interposer, routing one connection to another, creating a two-crystal cube, and even Stack two or more wafers vertically using the WoW method.
The so-called stacked wafer technology stacks working layers just like 3D NAND, instead of being placed horizontally on wafers. This approach means that more work cells can be placed in the same area. In the circle, it means that each wafer can communicate with each other very quickly and with minimal delay. For nVidia and AMD, a significant performance increase can be achieved.
Of particular interest is that manufacturers can use a stack of wafers to place two GPUs on a card and publish them as product updates, creating essentially two GPUs without displaying them. Multiple GPU settings for the operating system.
The biggest problem with stacking wafers now is that in addition to the wafer yield, it is also that once they are bonded, if only one wafer is broken, there will be two wafer retirement problems. And now the unit's unit heat has been Very high, using stacking technology will make the heat more concentrated, and the chip's life is also difficult to control.
TSMC's goal is to use WoW technology in future 7nm and 5nm manufacturing process nodes.
