SuperFlash Technology Memory Help | IoT Device Firmware Updates More Flexible

IoT devices are rapidly being introduced into major markets, from home appliances to medical devices to automobiles, and have a wide range of applications; manufacturers must lead the competition through continuous innovation and flexible adoption or integration of new technologies. Functional requirements and new regulatory requirements, designers must incorporate flexibility into their products to accommodate the evolving IoT ecosystem.

The firmware update capability can be customized not only during the initial installation at the customer site, but also after the product is installed, new features/features can be added on the spot, and any firmware issues can be fixed during use. NOR Flash Memory Volatile memory components have reproducible recording capabilities and are extremely reliable, and are often used as firmware program code storage media.

By rewriting the firmware of the component and changing part of the program (the component uses non-volatile memory), the manufacturer can easily update the device's features or upgrades. When you want to update the firmware, there are three things to consider, namely the update. What/how much program code, update frequency, and the time required to perform the update (speed).

First consider the number of firmware program code updates

At the initial design time of the IoT device, it is necessary to consider what/how many firmware programs are updated. Relative to the non-updatable portion, the updatable portion of the firmware must be stored in a separate area of ​​the NOR flash memory component. Updating any segment of the NOR flash memory requires first This section of memory is erased and the new information program is burned into this section. The NOR flash memory is divided into sections called sections and blocks, and their sizes are different.

NOR flash memory components (such as components using SST SuperFlash technology) are divided into multiple 4KB blocks. Each block can be individually erased and rewritten (4KB = 4 × 1024 × 8 bits = 32,762 bits). It can also be divided into For larger 8KB, 32KB and 64KB sections, these sections can also be erased individually.

Therefore, an 8KB size has 2 blocks, a 32KB size has 8 blocks, and a 64KB size has 16 blocks. Figure 1 shows that the SST26VF064B uses 8KB/32KB/64KB area memory composition, and each area can also Individual protection. Before performing any updates on any part of the flash memory, the area in that part must be unprotected to allow erase and burn operations.

The memory composition (image) of the SST26VF064B in Figure 1 consists of eight 8KB segments, two 32KB segments, and 126 64KB segments.

After the update is completed, these sections are carefully protected again to avoid accidental writing or erasure of these areas. The updatable part of the firmware must be divided into sections and blocks in a sufficiently flexible manner so as to simultaneously support a limited number of sections. And the maximum number of features/feature updates.

Since the speed of execution is determined by the number of sectors and blocks that need to be erased and rewritten, it is best to consider both speed and flexibility when organizing the updatable part of the firmware.

Figure 2 shows an example of organizing the memory as updatable and non-updateable parts. Non-updatable parts such as bootstrap code are stored in the protected area.

Figure 2 divides the memory organization into multiple non-updateable parts (such as loader code) and updatable parts (such as function/characteristic program code, image program code, and parameter variable program code).

The updatable parts of the firmware, such as features/features, etc., are divided into smaller sections or larger sections according to the flexibility requirements. Updatable images are stored in larger sections, with updatable variables/ Parameters are stored in smaller sections.

The main limitation of the firmware update frequency is the number of memory writes used in the application. The SuperFlash technology memory (such as SST26VF064B) can withstand 100,000 writes, which means that each sector can burn and erase 100,000 times. Times.

Calculate Firmware Write Resistance Verification Update Frequency

The firmware can be updated 100,000 times. It sounds a lot; however, many IoT devices collect data during use and store the information in NOR flash, so this must be taken into account when calculating the maximum write-tolerance limit.

Considering the number of writes, a sufficient number of segments must be allocated in memory. As will be illustrated below, it is assumed that the IoT device is collecting and storing 16 bytes of information, and the information is expected to be collected and stored during the lifetime of the product. 100 million times.

In this way, the number of sections that should be allocated can be calculated in the following manner:

. 1 section = 4 KB

Assume that all address units in the segment are used to store information (16 bytes of data at a time) and then write to a new address location until the end of the segment is reached (eg, 0x0000-0x000F , 0x0010-0x001F, 0x0020-0x002F, etc.).

Since 4 KB/16 bytes = 256, this is the number of times that the capacity can be written to the storage medium before reaching the section capacity and erasing any data in the section.

. The wipe resistance limit of 1 zone = 100,000 times.

Therefore, if one sector can be written 256 times and the number of scratch-resistant times is 100,000, then 25.6 million data can be collected and stored.

If an application needs to collect and store data 100 million times, the number of segments to be allocated is 100,000,000/25,600,000 = 3.9. Therefore, in this example, four segments need to be allocated to deal with 100 million life cycles. Byte data.

IoT equipment engineers must perform similar calculations to allocate enough sections and blocks for data logging parameters to avoid exceeding the write-tolerance limits of their NOR flash components.

Reduce update time and reduce machine downtime

The update speed can be calculated based on the number of sectors and blocks that need to be erased and rewritten. Suppose that the 1Mb, 2Mb or 4Mb firmware code/data stored in several 64KB sectors of the SST26VF064B needs to be re-recorded; program code/data It can consist of firmware code, images, or other program code that needs to be updated.

The update process involves executing a series of command instructions on the flash memory. The sequence will begin by unprotecting memory segments, then erasing them, burning them with updated data/program code, and finally reprotecting them.

SST26VF064B adopts SuperFlash technology that can provide better erase performance. Compared with traditional flash memory, the better erase performance provided by SuperFlash technology is very useful for shortening update time.

The maximum frequency frequency supported by SST26VF064B is 104MHz, the maximum segment erasing time is 25ms, and the maximum page burning time is 1.5ms. In addition, it takes 12ns delay ( CE) to work from issuing each command command to flash memory with a frequency of 104MHz. High time).

The specific methods are shown in Table 1 and Table 2, respectively. These calculations must be completed by the IoT equipment engineer to estimate the speed of execution of the update, in order to minimize the IoT equipment downtime during the update.

Selecting the appropriate volatile memory improves IoT device flexibility

IoT device designers need to provide some flexibility in updating application code and data. What/how much program code is updated, update frequency and update speed are issues that need to be solved when designing IoT devices; the choice of non-volatile memory will affect these Problems, and play a key role in calculating the time and speed of program code updates.

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