Subversion! Intel plots Big.Little size x86 new architecture: Codename Lakefield

Some friends who understand the mobile phone SoC, certainly no stranger to the 'Big.Little' architecture, this is the first heterogeneous CPU design on the ARM platform, can take into account high performance and low power consumption.

Have you ever thought that Intel x86 can follow suit?

In theory, Intel has developed many CPU architectures based on the x86 instruction set. High-performance Core (Core), such as 'Coffee Lake' 'Skylake' 'Haswell', etc., low-power platforms have the 'Silvermont' ATOM is using. 'Goldmont' etc.

According to the Motley Fool technology broke the people Ashraf Eassa, Intel is secretly developing the code design of 'Lakefield', where the high-performance big core is based on 'Icelake' and the small core is based on 'Tremont'.

IceLake is the platform code behind Cannonlake and is said to be used on the 10th generation Core, while Tremont is the successor to Goldmont Plus.

Eassa revealed that Intel will build 'Lakefield' SoC products with thermal design power consumption of 28W and 35W for use in notebooks and other products.

Of course, for such a brand-new 'size kernel' design, it may be necessary to do some in-depth optimization work on compatibility so that operating systems, software, games, etc. can be fully identified and efficiently mobilized.

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