Xilinx and Barefoot Networks Show 5G | Network Performance Monitoring Solutions

With the increased competition in 5G deployments, the ability to deliver high-performance and fully-visible network infrastructures for next-generation services and applications is crucial to commercial success. The 5G supports a range of feature-rich applications for automotive, Communications, defense, healthcare, industrial manufacturing, media, etc. These new services require lower latency, higher bandwidth, higher end-device capabilities, and the ability to split the network for use in Different Applications Monitoring network performance to understand the many parameters such as latency, bandwidth, and quality of service (QoS) is critical to service provisioning and customer service retention.

On March 5, 2018, Xilinx, Inc. (NASDAQ: XLNX) and Tofino, the world's fastest P4 programmable 6.5Tb / s Ethernet switch ASIC, launched the world's first Barefoot Networks, a network monitoring system that helps users gain a complete picture of every packet in their network, has demonstrated end-to-end to help network operators achieve visibility into each packet at nanosecond granularity Network performance monitoring solution.

Ed Doe, vice president of product, business and strategy at Barefoot Networks, said: 'The P4 programmability will support new modes such as' compute networking' that allow the network to act as a compute accelerator. The Barefoot Tofino ASIC- The combination of features and P4 SmartNICs based on Xilinx FPGAs not only helps 5G network operators gain a view of each packet but also defines innovative features in the network to increase computing resources and accelerate VNF Performance Barefoot Deep Insight helps them visualize any failure or problem that leads to performance degradation while analyzing and detecting them, identifying the source of the problem and fixing the problem so that it can be assured during the transition to an NFV-based infrastructure Customer Service Level Agreements (SLAs) are not affected. '

Farhad Shafai, vice president of marketing for Xilinx, said: "Xilinx is excited to be working with Barefoot Networks to demonstrate P4's programmability as it can be applied not only to network switches but also to SmartNICs in servers Network Function Virtualization (NFV) in 5G networks needs to process 100G / 200G packets at line rates to provide services such as vOLT and vBNG.To achieve these features, devices need to be able to support L2 / L3 processing, traffic classification, Stream buffering, OvS, TCP / IP, and VXLAN / NVGRE offload at 100/200G packet rates. Implementing these capabilities on P4 programmable SmartNICs based on Xilinx FPGAs not only enhances network performance but also enables Barefoot Deep The visibility advantage of Insight analytics enables network operators to use this capability to pinpoint problems with packet routing across the entire network.

Barefoot Tofino is the world's first ASIC family of end-user programmable Ethernet switches that enable customers to define the functionality of the forwarding layer in just a matter of minutes with P4, providing programmability for a wide range of use cases And high performance. Since its full release in 2017, Tofino has been used by customers in a wide range of market segments, such as very large data centers, enterprises and service providers to help them take full advantage of programmable features Meet the growing networking capabilities and performance requirements.

Barefoot Deep Insight is the world's first network monitoring system that provides complete visibility of all packets in the network Deep Insight detects almost any anomaly in the network such as microburst, congestion and load balancing issues This helps customers understand the four basic questions about each packet in their network: How does the packet come? Why? How long? How long? And why? Deep Insight is now available to key customers and partners Partner provided.

The SmartNIC incorporates Xilinx's latest UltraScale + ™ 16nm FPGA device, which can be programmed with the industry's first P4-facing FPGA-based compiler and features such as partial reconfiguration to enable users to program custom acceleration IP and packet processing capabilities, as well as support for Multi-rate network (10/25/40/50 / 100G) interface, up to 100Gbps host interface with PCIe Gen3x16, and software drivers for configuring host applications.

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