CMOS image sensors using conventional column-level ADC schemes typically read photoelectrically converted analog signals from pixels on a row-by-row basis, often causing image distortion (focal plane distortion) due to time drift due to progressive readout.
Sony's new CMOS image sensor includes a newly developed low-current, compact ADC under each pixel that instantly transforms all analog signals simultaneously exposed to digital signals into digital signals and temporarily stored in digital memory In. The architecture eliminates image distortion due to time drift and enables global shutter capability, making it the industry's first megapixel high-density back-illuminated CMOS image sensor with a pixel-parallel ADC.
This new CMOS image sensor contains nearly 1000 times the number of ADCs compared to a traditional column-level ADC solution, which means a substantial increase in current demand.Sony solved the problem with a newly developed compact 14-bit ADC, This new ADC delivers the best in the industry at low current operation.
The ADC and digital memories in the new CMOS image sensor are both stacked on the bottom chip with a Cu-Cu (copper-copper) interconnect between each pixel on the top chip and in January 2016, Sony first introduced the technology Achieve mass production.
In addition, Sony has developed a new data transfer architecture for this CMOS image sensor to enable high-speed, large-scale readout of data required for ADC processing.