The rise of applications such as AI, big data and cloud computing has propelled the PCIe that has been "sticky" for nearly a decade to release new specifications. Not only is version 4.0 released in October 2017, but the current 5.0 standard has also been formulated to 0.5 Version of PCIe finally usher in a wave of new wave of upgrades to meet market demand.
PCI-SIG has finally released version 4.0 of PCI Express (PCIe) in 2017 after the 3.0 release in 2010, and the 5.0 standard is expected to be released in 2019. A series of standard update initiatives, such as the Japanese mantle, or the late Qing dynasty , The "Meiji Restoration" and the "Reform Movement of 1898" were carried out through a series of reforms in response to Western ship launches. So what kind of industrial changes have we encountered in the last decade? Like Mountain "PCIe, set off a wave of" reform "wave?
AI rise / data volume increased by the end of PCIe 3.0 hard load
Rakesh Cheerla (Figure 1), senior product manager for PCIe and storage solutions at Xilinx, said that indeed, the time between PCIe 3.0 and 4.0 was significantly longer than the previous generation of PCIe standards.With machine learning, big data , And the rise of cloud computing, the thirst for PCIe bandwidth and Ethernet bandwidth over the past few years has also risen sharply.In many applications, server bandwidth is increasingly limited by the PCIe interface bandwidth.
Rakesh Cheerla, Senior Product Manager, Xilinx PCIe and Storage Solutions, believes that although PCIe 3.0 and 4.0 have long latencies, the 5.0 standard is quickly set to scale as the industry thrives on thirst for PCIe bandwidth.
The key to driving this wave of growth comes from data centers, telecom and enterprise markets, and PCIe interconnects play a key role in the performance of many widely available applications, boosting the performance of many applications in the market as PCIe 4.0 speeds improve.
PCIe 3.0 was introduced in 2010 with a transfer rate of 8GT / s, while PCIe 4.0 and PCIe 3.0 use 128B / 130B encoding to reduce data transmission bandwidth loss to less than 1.6%. However, the transfer rate of 4.0 is up to 16GT / s to meet the massive data transfer needs.
In addition, the other new features of PCIe 4.0 include Margining, reducing system latency, Scalability for added channel and bandwidth, improved I / O virtualization and platform consolidation, and support for service-oriented devices Tag, Credit, etc. As for PCIe 5.0, the current slightly different from 4.0 is that its standard data speed is up to 32GT / s.
Li Zhiyong, a senior application engineering manager at iResearch, pointed out that the rise of artificial intelligence (AI) has made the demand for high-bandwidth PCIe increasingly urgent. In particular, countries such as the United States, China or Europe that are actively developing AI will find PCIe 4.0 Upgrade requirements.
Figure 2 Li Zhiyong, Senior Application Engineering Manager of IAC, pointed out that China and the United States are actively developing AI because the upgrade needs of PCIe 4.0 will be more urgent.
Li Zhiyong further explained that since the release of PCIe 3.0 in 2010, the new standard is released only 10 years after PCIe, and the 4.0 and 5.0 release time are still so close, naturally due to the recent AI, deep learning (such as AlphaGo), data center high-speed transmission and cloud Increasing applications such as computing, making the surge in demand for bandwidth, prompting PCIe usher in a new wave of wave of upgrades.
Li Zhiyong disclosed that the demand for upgrading PCIe 4.0 will be relatively high especially for those countries that are actively developing AI and deep learning, such as the United States and China, because of the explosive growth of AI in high-bandwidth demand. In the event that the final version of PCIe 5.0 is not yet released , These countries will first be committed to the development of PCIe 4.0, in order to upgrade to the highest transfer rate, good development of AI-related applications.
In summary, AI, big data and high-speed data center transmission are the main factors driving PCIe's "change." Especially in the data center, as users' habits change, they are no longer pursuing high performance Of the "stand-alone PC" as the main goal, but focused on cloud streaming applications, such as watching streaming instant video (Netfilx), social networking sites, shopping platforms and so on.
The focus behind these applications lies in whether data centers and the cloud are capable of handling traffic and supporting traffic to meet the needs of users, so the platform vendors are very much concerned about the overall throughput of the data center and the traffic peak support capability .
For this reason, the bandwidth of Ethernet in the data center continues to move toward 200G / 400G. However, facing the bandwidth of 200G / 400G, the original PCIe 3.0 is gradually unable to cope with such a fast and massive data transmission demand. The data center The industry's need for upgrades to PCIe 4.0, or even 5.0, between the interface cards on the NIC and the motherboard is pressing and accelerating the PCIe 4.0 and 5.0 standards.
Wang Yuli, deputy manager of Anritsu's Business and Technical Support Division (Figure 3), explained that the main application market for either PCIe 4.0 or 5.0 is the data center servers, as well as switches, routers, Board; in the case of a large increase in transmission, not only the bandwidth of the Ethernet inside the data center continues to 200G / 400G, but also the demand for the upgrade of PCIe 4.0 or 5.0 is also quite strong.
Figure 3 Anritsu Business and Technical Support Project Assistant Wang Yuhuan said that PCIe 4.0 and 5.0 release schedule corresponds to the development of data center Ethernet 200G / 400G to meet the needs of high-speed transmission.
One of the factors of high speed / compatible CCIX or PCIe "change method"
Therefore, in addition to AI, data center and other factors, the rise of CCIX (Cache Coherent Interconnect for Accelerators), a new transmission standard, may also be one of the reasons that drive PCIe to accelerate the release of new specifications.
As mentioned above, the demand for various acceleration applications in the data center continues to rise, such as big data analytics, search, machine learning, wireless 4G / 5G networking, full database processing in memory, image analysis, and networking Processing and so on.
CCIX, the emerging transport standard, leverages the established server interconnect infrastructure while offering increased bandwidth, lower latency, and data synchronization with shared cache.
This standard not only dramatically increases accelerator availability and data center platform overall performance and efficiency, but also reduces the barriers to entry into existing server systems and improves the TCO of accelerated systems.In other words, no matter where data is stored, CCIX can access and process the data smoothly on each component side, not limited by the data storage location, and does not require a complicated program development environment.
At the same time, one of the biggest advantages of the CCIX specification is that it is based on the PCIe specification, with little or no CCIX compliance protocol passed over the PCIe link.In addition to being highly compatible with PCIe In fact, CCIX's cache coherency protocol can be passed over any PCIe link running at 8GT / s or faster.
PCIe 4.0 specifies a maximum data rate of 16GT / s, which achieves a total bi-directional bandwidth of about 64GB / s over a single 16-lane link. According to a Synopsys technical report, some members of the CCIX consortium As a result, a CCIX link can reach 100GB / s under the same conditions by increasing the transmission rate to 25GT / s, resulting in a problem called "Extended Speed Mode" (ESM ) CCIX features.
In addition, CCIX also has a special mechanism that allows components with ESM functionality to be compatible with PCIe components. Two CCIX components that wish to communicate with one another can be processed through the normal PCIe link initialization process to Maximum mutual support PCIe speed.In conclusion, CCIX not only has cache, interconnection consistency, the transmission speed is as high as 25GT / s.
CCIX alliance members are actively promoting the popularity of the standard.Xilinx, ARM, IWC and TSMC have jointly announced that together to create the world's first CCIX test chip, the test chip is expected in the first quarter of 2018 Initial production and production wafer orders are scheduled to ship in the second half of 2018. The chip uses TSMC's 7nm FinFET process technology and is based on ARM's DynamIQ CPUs and utilizes the CMN-600 interconnect chip internal bus and physical Physical IP.
To verify the complete subsystem, Emerson also provides key I / O and memory subsystems, including CCIX IP solutions (Controller and Physical Layer), PCIe 4.0 / 3.0 Silicon IP Solutions Solutions (Controller and Physical Layer), DDR4 Physical Layer, Peripheral IP and Related IP Drivers Including I2C, SPI, QSPI Test Chips Unanimously Agree on Chip Interconnect via CCIX Chips to Wire to Xilinx 16 nm Virtex UltraScale + FPGA.
Gaurav Singh, vice president of architecture at Xilinx, said CCIX will leverage the existing server interconnect infrastructure to provide higher bandwidth, lower latency and cache co-access shared memory to enhance the availability and overall performance of the accelerator so that Data center platform has more excellent efficiency.
Due to the large amount of data, data center upgrade needs are very urgent, new transmission standards will also take advantage of; and CCIX is not only compatible with PCIe, its 25GT / s transmission speed is also higher than 16GT / s PCIe 4.0, will inevitably be PCIe threatens, so Liu Zongqi, senior project manager of Applied Technology Department of Germany, speculated that the rise of CCIX may also be one of the factors that will speed up the update of PCIe standard.
Huang Fangchuan, technology manager at Taike (Figure 4), also pointed out that the rise of big data has made data centers increasingly demanding on rates, while the new ones have always been more flexible than the old ones. High transmission rate, and compatible with PCIe, indeed have considerable advantages in the market.However, it can not be concluded that CCIX will replace PCIe in the future, can only be said that the rise of CCIX provides a new choice for the transmission interface.
Figure 4 Taike technology manager Huang Fangchuan revealed that CCIX is still in the promotion phase, its high compatibility and high-speed transmission characteristics, bringing a new choice for the transmission interface.
As mentioned in the first paragraph of this section, no matter what kind of products, have their competitors. CCIX is currently not yet mature, still in the promotion stage, the related products are still under development; but its compatibility and high-speed transmission characteristics for the transmission The infusion of a new generation of fluid into the interface market has given new choices to system-on-chip (SoC) vendors such as server hubs and supercomputers, and as a result, the pace of PCIe standardization has accelerated.
Terminal application plays a key push PCIe 5.0 2019 schedule is expected to release
As mentioned above, the rise of applications such as AI and big data, and the urgent need for upgrading data centers, have driven the upgrade of PCIe for nearly a decade. However, PIC-SIG released the PCIe 4.0 in October 2017 and then plans to launch in 2019 Launched 5.0 version, but in the middle of more than a year apart, and the development of a standard specification, the process can be very complicated, PCIe 5.0 really launched as scheduled, it is inevitable that people hold some doubts.
In response, Rakesh Cheerla believes that the two standards PCIe 3.0 and 4.0 really have a long time.But now the industry to adopt new generation technology, the pace of faster and faster, shorter product cycles, not just the industry , Consumers are also experiencing a rapid increase in the demand for application performance, and the faster PCIe interface will be the key to boosting application performance, so the next generation PCIe 5.0 standard is bound to be even higher than that of PCIe 4.0 Quickly launched.
Du Liyi, manager of Anritsu's business and technical support department, also shared the same view that the reason for the current standard revisions is very different from the past in that "application" promotes the standard "update" instead of "standard update" Development. The market demand for PCIe 4.0 and 5.0 is increasing rapidly. The future popularity of products will not be as fast as that of PCIe 3.0. As of the time of launch, there is no immediate application requirement, which has been gradually popularized in 4,5 years.
According to Rakesh Cheerla, the key upgrade in the 5.0 standard is a doubling of link transmission rates from 16GT / s to 32GT / s. The 1.0 specification for the first release of PCIe 5.0 is not expected to appear too much due to a shortened 4.0 to 5.0 interval Function; also because of the small changes in 4.0 to 5.0, meaning 5.0 specifications will be developed very quickly.
Rakesh Cheerla speculates that the initial adoption of PCIe 5.0 will begin to popularize as server processor slots are introduced, and the actual adoption of 5.0 depends on several factors, including release 1.0 of PCIe 5.0 specification, Server wafer splicing and industry-compatible testing. The industry is working hard to speed up the time-to-market of this new technology to meet customers' needs for maximum efficiency.
All in all, in the data center high-speed Internet, AI applications demand surge in the case of PCIe 5.0 specification development is in full swing in progress, has been to 0.5 version, the final 1.0 version, not too far away, is expected to PCI-SIG previously planned schedule released a formal version in 2019 aimed at more new areas of high-performance applications; and Al-Yanes, chairman and president of PCI-SIG also expect PCIe 5.0 32GT / s bandwidth will be in the industry Establish a new speed standard.