Institute of Microelectronics, Chinese Academy of Sciences Liu Ming team 1Mb 28nm embedded resistive memory test chips and 8-layer stack of high-density three-dimensional resistive memory array made new progress.
The new memory represented by RRAM and MRAM is considered as the main solution for embedded storage in 28nm and subsequent process nodes.Liu Ming team has accumulated 10 years of research in the direction of RRAM and began to cooperate with SMIC in 2015, State Intellectual Property Center and other units to work together to promote research and cooperation RRAM practical. After more than two years of efforts in the SMIC 28nm platform to complete the process of development and verification, and on this basis, design and implementation Scale 1Mb test chip.
Vertical structure of the high-density three-dimensional cross-array, combining the advantages of 3D-Xpoint and 3D-NAND two architectures, with the advantages of simple preparation process, low cost and high integration density. Liu Ming team based on the previous four-layer stacking structure IEDM 2015 10.2, VLSI 2016 8.4) Realized the design of 8-layer structure, further verifying the possibility that the three-dimensional structure of RRAM is reduced to 5nm or less.
Relevant research results are respectively entitled "BEOL Based RRAM with One Extra-mask for Low Cost, Highly Reliable Embedded Application in 28 nm Node and Beyond, and 8-Layers 3D Vertical RRAM with Excellent Scalability towards Storage Class Memory Applications" at the International Electronic Equipment The meeting made a statement to speak.
(a) 28 nm RRAM 1Mb chip layout; (b) 28 nm RRAM cell TEM interface
8-layer stack RRAM cross section
