In May 2017, for the first time, Sun Yuancheng, the chief technology officer of TSMC, announced in its technical forum that he published eMRAM (Embedded Magnetoresistive Random Access Memory) and eRRAM (Embedded Resistive Memory) 2018 and 2019 risk pilot production, and will use advanced 22-nanometer process.
The goal of developing this technology is clear, is to achieve higher efficiency, lower power consumption, and smaller size to meet the future of intelligent and all things all-round computing needs now includes Samsung and Intel are R & D-related products and process technology.
Embedded memory process at the wafer level, by the foundry logic IC and memory chips integrated in the same chip.This design can not only achieve the best transmission performance, but also reduce the size of the chip, through One chip has reached the computing and storage functions, which is very attractive for IoT devices often require data operations and data storage.
To TSMC, for example, their main market is locked IoT, high-performance computing and automotive electronics.
However, since the mainstream flash memories are the basis of data writing, the durability and reliability of the mainstream flash memory can not reach 20nm, resulting in a large recession, making it unsuitable for use in advanced SoC designs. Software correction and algorithmic corrections can be made, but these techniques are not easy to convert in embedded system architectures, so next-generation memory, which is better suited for miniaturization, becomes the mainstream of advanced SoC designs.