Applied Meterials, Synopsys, Qualcomm, the co-founding chief of the combined chip manufacturing industry, simulated and analyzed design alternatives for five next-generation technologies at the heart of the discussion of discrete transistors and complete logic gates (including individual transistors) What is the difference in performance.
The result was that the final 'winner' was not one of the five candidates, but a new design by Qualcomm engineers called NanoRings.
'The equipment engineer or process engineer just optimizes some very limited features,' explains SCSong, chief engineer at QUALCOMM, Inc. In the device dimension, for example, the emphasis is on the gate of a transistor that works well Controlling the passage of current through it, however, other aspects became more important when converted into a complete logic gate rather than a single transistor.It is worth noting that Song and his team found that the device's parasitic capacitance - at The conversion process is lost due to unexpected capacitor structures - the real issue.
That's why Qualcomm chose nanosheets instead of IBM Nanosheets, which Qualcomm calls Nanoslabs. Looking from the side, Nanoslabs looks like a bunch of two or three rectangular silicon plates, each one The plate is surrounded by a high-k dielectric and a metal gate, which generates an electric field in the silicon to flow the current.
With the gate electrode completely surrounding each of the silicon plates, the current flow can be well controlled, but parasitic capacitance is also introduced because the structure between silicon, insulator, metal, insulator, and silicon is essentially a pair of capacitors It is noted that Nanorings addresses this problem by changing the shape of the silicon and does not completely fill the gaps between the metal plates. Baking the equipment in hydrogen causes the rectangular plates to elongate into an oval shape. Only the high-k dielectric completely surrounds them, and the metal gate does not completely surround it, so there is less capacitance. However, the electric field strength of the gate is still sufficient to dampen the current flow.
Chidi Chidambaram, vice president of process technology at Qualcomm, said capacitance scaling is the most challenging issue if the process technology is to be reduced to 7 nanometers or less. Despite this apparent victory in the simulation, Transistor issues are far from resolved in the chip, and Song and his collaborators plan to continue testing circuits and equipment with nanomaterials, and they plan to simulate more complex circuits and systems until a complete cell phone is made.
Lei Feng network learned that the final test results may be the most concerned about consumers - If the smart phone to run on nanotechnology, then it will accurately calculate the smart phone in the normal use of the remaining power after a day.