Self-driving AI chip nvidia more attention and applause | Intel considers product wrongly rated

Intel CEO Brian Krzanich at the U.S. Los Angeles Motor Show (Automobility LA), highlighting Intel's Mobileye EyeQ 5, a new drive PX Xavier System single chip ( SoC) is more than 1 time times higher in depth learning (DL) performance, the Intel self-driving solution architect and chief engineer Jack Weast says Intel is not a company that is particularly proud of its chip performance, but as recent discussions on the performance comparisons of self-driving chips have heated up, Intel needs to explain the performance of its chips because Intel is tired of being wrongly judged. According to the EE Times and auto Connected Car reports, Weast complains that Intel's rivals and media often incorrectly compare Nvidia Drive px to Intel desktop PC chips, Indicates that the Intel EyeQ5 chip uses 10 watts of power to achieve 24 megabits per second (TOPS) level, compared to the Nvidia DRIVE PX Xavier can provide TOPS performance, but the power consumption is also up to 30 watts, This shows that the Intel EyeQ5 chip efficiency is 2.4 times times the Nvidia chip. For Nvidia now strong dozen, expect 2018 delivery of the latest version from the driving chip Pegasus Soc, Weast also said that although Pegasus Soc is a new product, But its efficiency is still not getting better. Nvidia claims that the Pegasus Soc is up to $number TOPS, but consumes 500 watts, consisting of two Nvidia Xavier Soc and two next-generation independent graphics chips (GPU) and hardware accelerators. In this context, it is also curious about how Intel intends to combine Mobileye's EyeQ5 chips with Intel's microprocessors to develop a self-driving platform that Intel is still secretive about, and Weast says it plans to do so shortly after the US consumer Electronics Show in January 2018 (CES 2018), exposing a multiple-chip self-driving platform, the solution will combine EyeQ 5 Soc, Intel's Low-power Atom Soc, and other hardware such as I/O and B-too (Ethernet) networking technology. Intel earlier disclosed its ' go ' self-driving development platform in 2017, describing its ' C3000 ' atom processor as a chip that would provide a high performance per watt, combining real operations with low-power designs. As to how the Atom Soc will apportion processing tasks with the EyeQ 5 chip, Weast points out that Intel is looking at the full set of workloads necessary to drive from the car, allocating and distinguishing the operational load from multiple chips, and the field Programmable logic gate Array (FPGA) will not be part of Intel's self-driving multi-chip solution. . Weast explains that since driving requires different levels of Perceptron fusion, in the depth learning acceleration, the partial perceptron fusion needs 1 chips to handle the highly parallel multithreaded code block, for this EyeQ 5 chip is ideal solution, but at the same time for the higher level, the environment Perceptron Fusion also has the demand, at this time the central processing unit (CPU) is a more suitable chip for performing such tasks. Therefore, Weast pointed out that Intel believes that to achieve a high level of self-driving technology without having to cram all the processing needs into a single soc such as EyeQ 5, Intel still has a great opportunity to examine how different operational loads should be differentiated. Weast promised that Intel would soon be detailing its multiple-chip platform designed for self-driving vehicles, and that Intel should be able to provide a platform-level comparison of the Nvidia Drive PX with the Intel solution. It is noteworthy that Krzanich also announced that Intel will work with Warner Brothers (Warner Brothers) to develop a self-driving indoor virtual reality (VR) and augmented Reality (AR) immersive entertainment experience, given that such immersive experiences require huge processing and perceived needs, This is why Krzanich also mentions that its self driving chip solution is better than the Nvidia master because of its deep learning performance efficiency.

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