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In many designs that are very concerned with minimizing circuit space, the memory footprint is critical to miniaturized designs as the amount of data increases.The NOR of flash memory is often used to store boot programs, and NAND is often used to store Large amounts of data must be reserved for these flash memory ICs when designing the board.
Tandem NOR and NAND flash memory is more conducive to the design of micro-systems due to fewer pins, while Winbond serial NAND and NAND flash memories account for about 30% of the world's shipments, The shipment of tandem flash memory is the highest in the world. Winbond invented Quad Serial Peripheral Interface (QSPI) is a higher bandwidth, higher speed transmission interface, can be used to replace the traditional multi-pin parallel Flash memory applications, for example, are used to connect the microcontroller to the main chip.
In order to meet the design trend of miniaturization, Winbond has proposed an innovative application method that stacks serial NAND flash memory NOR and NAND chips in the same chip package. This method replaces the circuit design and must be used Two separate chips, which can save the circuit design space.
In this article, we mainly point out the bottlenecks and problems we encountered in the traditional use of two or more stacked chips. We also show how to use the stacked chip solution proposed by Winbond To solve these problems, to further improve product performance!
The benefits of using stacked memory chips
Usually a small device will use a 16Mbit NOR flash memory to store the boot process, the other will use a 1Gbit NAND flash memory to store data or operating system.NOR flash memory has the advantage of fast read, but Let the system carry on the random access, is suitable for the application that needs to read the data frequently fast.But NAND flash memory has faster writing speed, the price is also cheaper than 512Mbit above NOR flash memory.
The current general design mostly uses individual NOR and NAND flash memories to interface with the main chip.
However, the current design using two memories respectively achieves the same design result through the SpiStackTM series stack products provided by Winbond (as shown in the following figure 1), and the advantage is that the circuit board design can be reduced by one memory element to make the circuit design have more Flexibility further reduces board size.
In addition to the application of NOR plus NAND stack, but also can be NOR plus NOR or NAND plus NAND stack combination.For example, the original design is 512Mbit NAND needs to be expanded to 1Gbit, but it may be 1Gbit NAND package size may be the original Using different 512Mbit, resulting in the need to change the circuit board design.Wu Huabang this flexible combination of stacked chips, with two 512Mbit NAND plus NAND chips stacked in the original package, not only allows the memory capacity increased to two Times, but also save the problem of redesign board.
The main concept of stacked chips is to reduce the chip pin, to simplify the circuit design and reduce the redesign of the work required, but Winbond's stacked chip solution not only can not increase the chip pin to maintain circuit design flexibility, but also Further improve reading and writing performance.
Low pin count stacked chip solution
One of the main challenges in stacking chips is how to communicate the main chip or microcontroller with the flash memory stacked in the same package.To avoid conflicts on the SPI communication interface, The hardware signal to select the SPI interface to access flash memory.
Stacked chips in other manufacturers approach, the chip select (CS) is achieved through the hardware signal, so if the two chip stack requires two chip select (CS) pin, if the stack of three chips would need three Chip select (CS) pin, and so on.
Obviously such a stacked chip approach, adding a lot of chip select (CS) pin, of course, also requires more space on the circuit board to these signal lines.
However, this problem can be solved by the newly introduced W25M SpiStackTM series flash memory from Winbond. The main chip selects a flash memory chip to be accessed by using software through a chip select (CS) instruction Figure 2). Each chip in the stacked chip has an independent, non-conflicting identification code (ID) that allows the software to execute chip select (CS) and know which chip is being accessed One.
Because it is software-selectable by a Chip Select (CS) instruction to select the flash memory chips to be accessed, 2 to 4 chips can be packaged in a standard 8-pin SOP or 8-pad SON package As shown in Figure 3. However, other vendors must add more chip select pins (CSs) to stack the chip, which often requires the use of 16-pin SOPs or larger 24-ball BGA packages to increase circuit design the complexity.
It is relatively easy for developers to implement Winbond's SpiStackTM's multichip select (CS) instructions, which can be used to select any stacked chip (Figure 4), regardless of the current state of the chip Switch at any time to select the chip.
How to achieve faster read and write performance
The slow write speed is a characteristic of flash memory as compared to SRAM and DRAM, and one of the common situations encountered by the system is that when a flash memory is to be read, When you want to read the flash memory you need to wait for the completion of the write process, thus wasting the system waiting time.Another approach is to execute instructions to write program to pause, wait until after reading the required data , And then the implementation of the reply write command to write previously unfinished program to continue execution, but this approach will not only make the implementation of the complex change, but also slow down the real time to read and write.
Winbond's stacked chips can avoid the aforementioned problems by operating simultaneously, that is, when a chip is performing a program of writing or erasing, another chip can be read at the same time (as shown in FIG. 5).
Fig. 5: The program that the main chip can read, write or erase another chip simultaneously when writing or erasing one chip in two stacked chips of Winbond flash memory.
As previously described, only one chip can be selected at a time on the SPI interface, but Winbond's SpiStackTM technology allows both chips to operate simultaneously, for example, when a chip is writing or erasing at the same time Read another chip, or issue a write or erase instruction to another chip at the same time when a chip is writing or erasing.
In many applications, the ability to use simultaneous operations can dramatically improve the performance of memory operations, which means that Winbond SpiStackTM can operate faster and more efficiently than other modes of operation that can only execute one program at a time.
Provide homogeneous and heterogeneous flash memory stack with a combination
Winbond's SpiStackTM stacked chip solutions offer customers a range of flash memory capacity and package combinations that include homogeneous memory stacks such as NOR + NOR or NAND + NAND or heterogeneous memory stacks such as NOR + NAND), etc. As a world-class memory designer and manufacturer, Winbond offers the most diverse product portfolio to meet customers' needs for memory capacity and package.
Elastic design and the use of common packaging is the development of designers for the selection of memory is an important consideration, so the purpose is to allow the design can be directly replaced after the different sizes of memory without the need for circuit changes.
Currently available SpiStackTM stacked chip products include:
a 16Mbit NOR + 1Gbit NANDa 32Mbit NOR + 1Gbit NANDa 64Mbit NOR + 1Gbit NANDa 128Mbit NOR + 1Gbit NANDa 512Mbit NOR consisting of two 256Mbit NOR diesa 2Gbit NAND consisting of two 1Gbit NAND dies More products to be delivered in 2018 in China Spangler's SpiStackTM product catalog, which also plans to supply through the needs of customers.